Heartbleed exposes weaknesses in hardware design

Heartbleed exposes weaknesses in hardware design

تاریخ ایجاد

Number: IRCNE2014082294
Date: 2014-08-19

According to “techworld”, Heartbleed may have been a software bug, but it highlighted glaring weaknesses in existing hardware architectures, which remain vulnerable to memory-bound attacks, a university researcher said this week.
Data is vulnerable to hackers when in transit or in computer memory, said Ruby Lee, professor of engineering at Princeton University's Department of Electrical Engineering, at a presentation to the Hot Chips conference.
The weakness is in the memory and cache, or secondary memory where data temporarily resides before being sent for processing or storage.
Securing memory was a hot discussion topic among chip experts at the forum, and Heartbleed sparked discussions on how hackers could access data from memory, storage and interconnects. Chip makers talked about hardware being the first line of defense against such attacks, and proposed techniques to scramble data and secure keys within a chip. A research project at Princeton funded by the U.S. Department of Homeland Security recommended a new architecture that could secure memory and cache.
Heartbleed exposed a critical defect in affected versions of the OpenSSL software library, which enables secure communication over the Internet and networks. Heartbleed affected servers, networking gear and appliances, and hardware makers have since issued patches to protect systems.
"Lots of people have talked about the attacks, but very few people have talked about the solutions," Lee said. "The hardware is still leaking out your secret keys all the time. Every single piece of hardware that has a cache is vulnerable to cache-side channel leakage."
It's difficult to launch software attacks on hardware, but side-channel attacks can be dangerous, Lee said.
To mitigate such attacks, Lee and researchers at Princeton have reconstructed cache architecture so tracks left by the victim are effectively wiped out, making it difficult to carry out side-channel attacks. The cache architecture, called Newcache, could replace the exposed cache and memory in systems today.
Newcache is structured like regular cache, but has dynamic and randomized cache mapping that will make it harder for attackers to correlate memory usage to key bits. That will make it hard for hackers to map the cache and extract data.
Newcache is ready to implement, and the additional security measures won't hurt performance, Lee said. Memory typically slows down when new features -- like ECC for error correction -- are added. But benchmarks of Newcache actually showed improvements in system performance, Lee said.
It could take years for chip and system makers to change memory features, but Lee said chip makers need to start thinking about securing data within systems, Lee said.

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